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Letter "E" » Eric Lyness Quotes
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«Say the FPGA chip counted 180 steps between encoder increments. Dividing 180 by four yields 45, so between the next two decoder valve changes, we waited 45 cycles and incremented a 2-bit count, waited another 45 cycles and incremented the count again, and so on. We reset the 2-bit counter and performed the division again after each encoder increment to keep the piston synchronized with any change in the valve's speed.»
Author: Eric Lyness
«The calculations took place so quickly that we never saw any change in synchronization as the valve motor accelerated or decelerated.»
Author: Eric Lyness
«Here's an example of a simple trap I fell into. I set up a 512-element array of sine-wave values. When the FPGA code didn't finish compiling after several hours I discovered I shouldn't design an FPGA-based application that contains an array with more than 32 elements.»
Author: Eric Lyness
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